The present invention relates to the parametric testing of semiconductor wafers and, in particular, to the contemporaneous performance of such tests.
As semiconductor wafer size has increased (e.g., 200 mm to 300 mm), the number of test measurements has also increased (e.g., doubled). It has become very desirable to perform more tests in less time as testing time corresponds closely to testing costs. Unfortunately, the time for individual tests has already been reduced to minimums constrained by such factors as settling time.
Performing multiple tests contemporaneously, or in parallel, allows more tests to be performed in the same time. However, including parallel test procedures in a testing regimen greatly increases the overall complexity of the regimen. This has heretofore greatly limited the use of parallel testing, because the test writer had to not only decide what tests to perform, but also, deal with the complex issues of multithreaded programming.